Job Responsibilities:

• RTL design, analysis, and verification of wireless modem functional blocks.
• Support lab verification and system integration on both FPGA and ASIC platforms.
• Interface with other groups within the company, primarily systems and software engineering.

Skills and Experience:

• Solid understanding of logic design, Verilog/VHDL coding and analysis, synthesis.
• C/C++ programming skills and proficiency in Perl, BASH, or TCL script languages desirable.
• Familiarity with wireless communications systems highly desirable.
• Strong written and oral communication skills.
• BSEE or equivalent.