Job responsibilities:

• Area/power optimized architecture and design targeting wireless ASICs.
• Work with systems and software engineers to drive modem area/power/performance architectural trade-offs.
• RTL design, analysis, and verification of wireless modem functional blocks.
• Provide technical guidance and direction to digital ASIC designers.
• Support lab verification and system integration on both FPGA and ASIC platforms.
• Interface with other groups within the company, primarily systems and software engineering.

Skills and Experience:

• 10+ years of ASIC and FPGA design of wireless communications systems.
• Strong theoretical knowledge of wireless communication systems and experience with embedded microprocessors.
• Expert understanding of logic design, Verilog/VHDL coding and analysis, synthesis.
• Thorough understanding of the back end physical design flows including: floor planning, place and route, signal integrity based timing analysis/closure.
• Familiarity with design for low power techniques and implementation.
• Familiarity with design for test techniques and implementation.
• Strong written and oral communication skills.
• Self starter, Ability to work independently and in a highly motivated team.
• BSEE, MSEE preferred